The present invention relates to a method of constructing a fuse means for a semiconductor device and a circuit adapted to utilize the same.
A fuse means is widely used in a semiconductor device to restore a memory cell through repair, to adjust transistor dimensions, to provide a desired transmission delay for a signal, and to control the pulse-width of a signal.
One commonly-used type of fuse means comprises a one-piece fuse set. A problem with this fuse means is that when the fuse of the fuse means is imperfectly cut one cannot obtain the expected and desired circuit operation.
For example, a fuse means may be utilized as a means for repairing a circuit by replacing an impaired main cell with a redundancy cell in order to improve the production yield of a memory device. In such a case, replacement is usually performed by cutting a fuse of a redundancy decoder in accordance with the address of the main cell to be replaced by utilizing a laser beam cutting device.
FIG. 1 is a circuit diagram illustrating a portion of a redundancy decoder which is constructed by using a conventional fuse construction method. It illustrates the portion of the redundancy decoder comprising one master fuse portion F.sub.M and decoding fuse portions F.sub.D 's with each of the decoding fuses corresponding to a row address.
In such a redundancy decoder it is generally necessary to perform repairs by cutting the master fuse F.sub.M and then selectively cutting a decoder fuse F.sub.D corresponding to the address of an impaired main cell. However, performing such repairs normally cannot be done very easily in such a manner as to avoid imperfect cutting of the fuses and subsequently impaired operation of the circuit.
A repair operation involving a master fuse portion is described in more detail as follows.
During a repair, when a signal RCS.sub.X B is maintained at a low level of potential and the master fuse is cut properly, the potential of a node N1 is raised to a high level. However, when master fuse F.sub.M is not completely cut, the master fuse will then serve as a resistance, thus turning off a PMOS transistor T2, which in turn decreases the potential of node N1 to a low level.
Similarly, incomplete cutting of decoding fuse F.sub.D has undesired consequences. Such improper repair attempts bring about current leakage through a ground which should be prevented in normal operation.
FIGS. 2A to 2C are photos illustrating the imperfect cut of a fuse having the construction of a conventional fuse means and the result of a structural analysis of the cut portion.
FIG. 2A is a photo showing the cut portion of a fuse, while FIG. 2B is a photo showing a magnification of the cut portion of the fuse shown in FIG. 2A. Each of FIGS. 2A and 2B indicate that the fuse is not completely cut through. FIG. 2C is a photo showing the result of the structural analysis of the fuse portions remaining as a result of the incomplete cutting attempt. FIG. 2C indicates that silicon, which is identical to that constructing the fuse, remains in the cut section of the fuse portion.
Imperfect cutting of a fuse also imposes constraints on use of the fuse for the adjustment of transistor dimensions, the transmission delay of a signal and the control of the pulse-width of a signal. In the case of a fuse fabricated for the transmission delay of a signal, for example, the imperfect cut of the fuse serves as a principal factor to deteriorate reliability of a semiconductor device. The phenomenon of speed-push, that is, causing less delay than is expected to happen, is one undesired consequence that frequently arises.